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+ Bluetooth 5.3 + 802.15.4 Tri-radio 12 x 12 LGA Module Datasheet Rev. B DF For Standard FORM NO.: FR2-015_ A Responsible DepartmentWBU 1 Features WLAN IEEE 802.11a/b/g/n/ac/ax, 1x1 SISO 2.4 GHz and 5 GHz, up to 80 MHz channel Integrated high power PA up to +21 dBm transmit power Integrated LNA and T/R switches UL/DL OFDMA, UL/DL MU-MIMO 802.11ax ER, DCM, TWT 802.11az accurate ranging Security: WPA3 security with hardware encryption engines Bluetooth Supports Bluetooth 5.3 Class 2 and Bluetooth Low Energy BDR/EDR packet types1 Mbps (GFSK), 2 Mbps ( /4-DQPSK), 3 Mbps (8DPSK) Bluetooth LE long range (125/500 kbps) support improving range by 4x Bluetooth LE 2 Mbps Bluetooth LE advertising extensions for improved capacity Isochronous channels (ISOC) supporting Bluetooth Low Energy (LE) audio Security: AES 802.15.4 IEEE 802.15.4-2015 compliant supporting Thread in 2.4 GHz band Shared transmitter and antenna pin with Bluetooth Simultaneous receive with Wi-Fi and Bluetooth MAC accelerator with packet formatting, CRCs, address check, auto-acks, timers FORM NO.: FR2-015_ A Responsible DepartmentWBU 2 Revision History Document NO: R2-2549-DST-01 Version Revision Date DCN NO. Description Initials Approved A B 2022/07/01 DCN026641 Draft version Roger Liu N.C Chen 2023/08/05 DCN029872 Update BT feature to 5.3 Update RF specification Update power consumption Roger Liu N.C Chen FORM NO.: FR2-015_ A Responsible DepartmentWBU 3 Table of Contents Revision History .....................................................................................................................................3 Table of Contents ...................................................................................................................................4 1. Introduction .........................................................................................................................................5 1.1 Product Overview ............................................................................................................................................... 5 1.2 Block Diagram .................................................................................................................................................... 6 1.3 Specifications Table .......................................................................................................................................... 7 1.3.1 General ........................................................................................................................................ 7 1.3.2 WLAN ........................................................................................................................................... 7 1.3.3 Bluetooth ................................................................................................................................... 10 1.3.4 Thread ........................................................................................................................................ 10 1.3.5 Operating Conditions ............................................................................................................... 11 2. Pin Definition ..................................................................................................................................... 12 2.1 Pin Map ............................................................................................................................................................. 12 2.2 Pin Table ........................................................................................................................................................... 13 3. Electrical Characteristics ................................................................................................................ 15 3.1 Absolute Maximum Ratings ............................................................................................................................ 15 3.2 Recommended Operating Conditions ........................................................................................................... 15 3.3 Digital IO Pin DC Characteristics ................................................................................................................... 15 3.3.1 1.8V Operation (VDDIO) ......................................................................................................... 15 3.3.2 3.3V Operation (VDDIO) ......................................................................................................... 15 3.4 Host Interface ................................................................................................................................................... 16 3.4.1 SDIO Interface .......................................................................................................................... 16 3.4.2 SDIO Protocol Timing .............................................................................................................. 17 3.4.3.High-Speed UART Interface ................................................................................................... 20 3.4.4 PCM Interface ........................................................................................................................... 21 3.4.5 SPI Interface ............................................................................................................................. 23 3.5 Timing Sequence ............................................................................................................................................. 24 3.6 Power Consumption* ....................................................................................................................................... 25 3.6.1 WLAN ......................................................................................................................................... 25 3.6.2 Bluetooth ................................................................................................................................... 26 3.6.3 802.15.4 ..................................................................................................................................... 27 3.7 Sleep Clock (Optional) ..................................................................................................................................... 27 4. Mechanical Information ................................................................................................................... 29 4.1 Mechanical Drawing ......................................................................................................................................... 29 5. Packing Information ......................................................................................................................... 30 FORM NO.: FR2-015_ A Responsible DepartmentWBU 4 1. Introduction 1.1 Product Overview AzureWave Technologies, Inc. introduces the IEEE 802.11a/b/g/n/ac/ax 1x1 dual band WLAN, BT, and 802.15.4 tri-radio module AW-XM549. With full-feature Wi-Fi subsystem integrated into a module, AW-XM549 provides the best and most convenient SMT process. The module is targeted to smart entertainment, gateways, hubs, bridges, smart home, industrial, point of sale (POS) terminal, smart appliances which need convenient SMT process. By using AW-XM549, the customers can easily integrate the Wi-Fi, BT, 802.15.4 by a combo module with the benefits of high design flexibility, high success rate on SMT process, short development cycle, and quick time-to-market. Compliance with the IEEE 802.11 a/b/g/n/ac/ax standard, the AW-XM549 uses DSSS, OFDM, DBPSK, DQPSK, CCK and QAM baseband modulation technologies. A high level of integration and full implementation of the power management functions specified in the IEEE 802.11 standard minimize the system power requirements by using AW-XM549. The AW-XM549 supports standard interface SDIO3.0 for WLAN, UART for BT and SPI for 802.15.4. AW-XM549 is suitable for multiple mobile processors for different applications. With the combo functions and the good performance, the AW-XM549 is the best solution for the consumer electronics and smart applications. FORM NO.: FR2-015_ A Responsible DepartmentWBU 5 1.2 Block Diagram TBD FORM NO.: FR2-015_ A Responsible DepartmentWBU 6 1.3 Specifications Table 1.3.1 General Features Description Product Description IEEE 802.11 a/b/g/n/ac/ax Wi-Fi with Bluetooth 5.3 and 802.15.4 tri-radio Module Major Chipset NXP IW612 WLCSP (140pins) Host Interface WiFi + BT + 802.15.4 SDIO + UART + SPI Dimension 12 mm X 12 mm x 2 mm(Max) Form Factor LGA module, 48 pins Antenna For LGA, 1T1R, external ANT(Main)Wi-Fi / Bluetooth/802.15.4 TX / RX Weight 0.6 g 1.3.2 WLAN Features Description WLAN Standard IEEE 802.11 a/b/g/n/ac/ax Wi-Fi 6 WLAN VID/PID WLAN SVID/SPID NA NA Frequency Rage 2.4 GHz ISM Bands 2.412-2.472 GHz 5.15-5.25 GHz (FCC UNII-low band) for US/Canada and Europe 5.25-5.35 GHz (FCC UNII-middle band) for US/Canada and Europe 5.47-5.725 GHz for Europe 5.725-5.825 GHz (FCC UNII-high band) for US/Canada Modulation DSSS, OFDM, DBPSK, DQPSK, CCK, 16-QAM, 64-QAM, 256-QAM, 1024-QAM, OFDMA FORM NO.: FR2-015_ A Responsible DepartmentWBU 7 2.4GHz:
USA, NORTH AMERICA, Canada and Taiwan - 1 ~ 11 China, Australia, Most European Countries - 1 ~ 13 Japan, 1 ~ 13 Number of Channels 5GHz:
USA, Canada, Most European Countries
-36,40,44,48,52,56,60,64,100,104,108,112,116,120,124,128,132, 136,140,149,153,157,161,165 Japan -
36,40,44,48,52,56,60,64,100,104,108,112,116,120,124,128,132,1 36,140 China - 36,40,44,48,52,56,60,64, 149,153,157,161,165 2.4G 11b (11Mbps)
@EVM<35%
11g (54Mbps)
@EVM
-27 dB 11n (HT20 MCS7)
@EVM 11n (HT40 MCS7)
@EVM 11ax(HE20 MCS11)
@EVM 11ax(HE40 MCS11)
@EVM
-28 dB
-28 dB
-35 dB
-35 dB Min 15 14.5 12.5 12.5 10.5 10.5 Typ 17 16 14 14 12 12 Max 19 Unit dBm 17.5 dBm 15.5 dBm 15.5 dBm 13.5 dBm 13.5 dBm Output Power
(Board Level Limit)*
5G Min Typ Max
-28 dB
-28 dB
-27 dB 11a (54Mbps)
@EVM 11n (HT20 MCS7)
@EVM 11n (HT40 MCS7)
@EVM 11ac(VHT20 MCS8)
@EVM 11ac(VHT40 MCS9)
@EVM 11ac(VHT80 MCS9)
@EVM 11ax(HE20 MCS11)
@EVM 11ax(HE40 MCS11)
@EVM
-32 dB
-31 dB
-32 dB
-35 dB
-35 dB 14 14 14 12 12 12 9 9 16 16 16 14 14 14 11 11 18 18 18 16 16 16 13 13 Unit dBm dBm dBm dBm dBm dBm dBm dBm FORM NO.: FR2-015_ A Responsible DepartmentWBU 8 11ax(HE80 MCS11)
@EVM
-35 dB 9 11 13 dBm 2.4G 11b (11Mbps) 11g (54Mbps) 11n (HT20 MCS7) 11n (HT40 MCS7) 11ax (HE20 MCS11) 11ax (HE40 MCS11) Receiver Sensitivity 5G 11a (54Mbps) 11n (HT20 MCS7) 11n (HT40 MCS7) 11ac(VHT20 MCS8) 11ac(VHT40 MCS9) 11ac(VHT80 MCS9) 11ax(HE20 MCS11) 11ax(HE40 MCS11) 11ax(HE80 MCS11) Min
Min
Typ
-85
-71
-66
-67
-57
-57 Typ
-68
-66
-63
-62
-58
-56
-56
-54
-53 Max
-82
-68
-63
-64
-54
-54 Max
-65
-63
-60
-59
-55
-53
-53
-51
-50 Unit dBm dBm dBm dBm dBm dBm Unit dBm dBm dBm dBm dBm dBm dBm dBm dBm Data Rate Security WLAN:
802.11b : 1, 2, 5.5, 11Mbps 802.11a/g : 6, 9, 12, 18, 24, 36, 48, 54Mbps 802.11n : Maximum data rates up to 72 Mbps (20 MHz channel), 150 Mbps (40 MHz channel) 802.11ac: Maximum data rates up to 433 Mbps (80 MHz channel) 802.11ax: Maximum data rates up to 600 Mbps (80 MHz channel) WiFi: WPA3, WPA2, WPA2 and WPA mixed mode, WEP BT: AES 802.15.4 :AES
* If you have any certification questions about output power please contact FAE directly. FORM NO.: FR2-015_ A Responsible DepartmentWBU 9 1.3.3 Bluetooth Features Description Bluetooth Standard Full Bluetooth 5.3 features Frequency Rage 2402MHz~2483MHz Modulation Output Power Receiver Sensitivity Header GFSK Payload 2M: /4-DQPSK Payload 3M: 8DPSK BDR EDR Low Energy Min 0 0 0 BT Sensitivity (BER<0.1%) BDR(DH1) EDR(2DH5) EDR(3DH5) Low Energy Min
Typ 2 2 2 Typ
-89
-87
-81
-91 1.3.4 Thread Features Description Max 4 4 4 Max
-86
-84
-78
-88 Unit dBm dBm dBm Unit dBm dBm dBm dBm Thread Standard IEEE 802.15.4-2015 compliant supporting Thread in 2.4 GHz band Frequency Rage 2400MHz~2483.5MHz Modulation O-QPSK Output Power Thread Min 2 Typ 4 Max 6 Unit dBm Receiver Sensitivity Thread Min
Typ
-95 Max
-92 Unit dBm Thread Sensitivity (PER<1%) FORM NO.: FR2-015_ A Responsible DepartmentWBU 10 1.3.5 Operating Conditions Features Description Operating Conditions Voltage 3.3V +-5%
Operating Temperature 0 oC to +70 oC Operating Humidity Less than 85% R.H. Storage Temperature
-40 oC to +85 oC Storage Humidity Less than 60% R.H. Human Body Model
+-2kV Changed Device Model +-500V ESD Protection FORM NO.: FR2-015_ A Responsible DepartmentWBU 11 2. Pin Definition 2.1 Pin Map AW-XM549 Pin Map (top view) FORM NO.: FR2-015_ A Responsible DepartmentWBU 12 2.2 Pin Table Pin No 1 2 3 4 5 Definition GND1 RF_ANT GND3 SPI_TXD SPI_RXD 6 7 8 9 10 11 12 HOST_WAKE_ BT BT_WAKE_HOST SPI_FRM VBAT JTAG_TMS SPI_CLK PDn 13 WL_WAKE_HOST Basic Description Ground RF pin out Ground SPI receive output signal SPI receive input signal GPIO Mode : GPIO[18]. BT Device Wake GPIO Mode : GPIO[19]. BT Host Wake SPI_FRM - SPI frame signal 3.3V power voltage source input JTAG test mode select input signal. GPIO[29]
SPI_CLK - SPI clock signal Full Power-down (input) (active low) 0 = full power-down mode 1 = normal mode
(Need external pull high 51k resistor to VDDIO) GPIO Mode : GPIO[17]. Wi-Fi radio wake-up output signal SDIO_DATA2 SDIO Data line Bit[2]
SDIO_DATA3 SDIO Data line Bit[3]
SDIO_CMD SDIO_CLK SDIO Command SDIO Clock input SDIO_DATA0 SDIO Data line Bit[0]
SDIO_DATA1 SDIO Data line Bit[1]
21 DCDC_1V8_OUT GND20 VDDIO 1V8_IN NC24 Ground Internal DC-DC output
(Need external 1uH power inductor) 1.8V/3.3V Digital I/O Power Supply 1.8V power voltage source input Floating Pin, No connect to anything. BT_PCM_OUT PCM Data output / GPIO[5]
BT_PCM_CLK PCM Clock / GPIO[4]
BT_PCM_IN PCM data input / GPIO[6]
BT_PCM_SYNC PCM sync signal / GPIO[7]
JTAG_TDO JTAG_TDI GND31 NC32 GND33 BT_DIS JTAG_TCK JTAG test data output signal. GPIO[31]
JTAG test data input signal. GPIO[30]
Ground Floating Pin, No connect to anything. Ground Host-to-BT reset /IND_RST_BT - Independent software reset for Bluetooth / GPIO[2]
JTAG test clock input signal. GPIO[28]
FORM NO.: FR2-015_ A Responsible DepartmentWBU 13 14 15 16 17 18 19 20 22 23 24 25 26 27 28 29 30 31 32 33 34 35 Voltage
VDDIO VDDIO VDDIO VDDIO VDDIO 3.3V VDDIO VDDIO 1.8V/3.3V Type
I/O
I/O I/O I/O I/O I/O P I/O I/O I VDDIO O VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO
1.8V I/O I/O I/O I I/O I/O
P 1.8V/3.3V 1.8V
VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO
VDDIO VDDIO P P Floating O I/O I I/O O I
Floating
I I 36 GND36 37 Host-to-Wi-Fi reset 38 39 MWS_SOUT MWS_SIN 40 HOST_WAKE_WL Ground GPIO Mode : GPIO[1]. Independent software reset for Wi-Fi WCI-2 MWS coexistence serial transport interface(TX) / GPIO[26]
WCI-2 MWS coexistence serial transport interface(RX) / GPIO[25]
GPIO Mode : GPIO[16]. Host-to-WLAN wake
/ Wi-Fi radio wake-up input signal
VDDIO VDDIO VDDIO
I I/O I/O VDDIO I 41 42 43 44 45 46 47 48 UART_RTS_N UART_RTSn (active low) UART_TXD UART_RXD UART_CTS GND45 IND_RST_15.4 RST_IND SPI_INT UART_SOUT UART_SIN(active high) UART_CTS(active high) Ground Independent software reset for 802.15.4 / GPIO[24] VDDIO Independent software reset indicator output signal to host / GPIO[22]
SPI interrupt signal / GPIO[20]
VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO
O O I I
I/O I/O I/O FORM NO.: FR2-015_ A Responsible DepartmentWBU 14 3. Electrical Characteristics 3.1 Absolute Maximum Ratings Symbol VBAT DC supply for the 3.3V input VDDIO I/O power supply Parameter Minimum Typical Maximum Unit
3.3 3.3 1.8 3.96 3.96 2.16 V V 3.2 Recommended Operating Conditions Symbol Parameter Minimum Typical Maximum Unit VBAT DC supply for the 3.3V input VDDIO 1.8V/3.3V digital I/O power supply 3.14 3.14 1.71 3.3 3.3 1.8 3.46 3.46 1.98 V V 3.3 Digital IO Pin DC Characteristics 3.3.1 1.8V Operation (VDDIO) Symbol Parameter Minimum Typical Maximum Unit Input high voltage 0.7*VIO Input low voltage
-0.4 Output high voltage VIO-0.4 Output low voltage
100 VHYS Input Hysteresis 3.3.2 3.3V Operation (VDDIO)
VIO+0.4 0.3*VIO
0.4 V mV Symbol Parameter Minimum Typical Maximum Unit Input high voltage 0.7*VIO Input low voltage
-0.4 Output High Voltage VIO-0.4 Output Low Voltage VHYS Input Hysteresis
VIO+0.4 0.3*VIO
0.4 V mV VIH VIL VOH VOL VIH VIL VOH VOL
100 15 FORM NO.: FR2-015_ A Responsible DepartmentWBU 3.4 Host Interface 3.4.1 SDIO Interface The AW-XM549 supports a SDIO device interface that conforms to the industry SDIO Full-Speed card specification and allows a host controller using the SDIO bus protocol to access the Wireless SoC device. The AW-XM549 acts as the device on the SDIO bus. The host unit can access registers of the SDIO interface directly and can access shared memory in the device through the use of BARs and a DMA engine. Support SDIO 3.0 Standard. On-chip memory used for CIS. Supports 4-bit SDIO and 1-bit SDIO transfer modes. Special interrupt register for information exchange. Allows card to interrupt host. SDIO Interface Signals AW-XM549 SDIO Pin Name Type SDIO_CLK SDIO_CMD SDIO_DATA3 SDIO_DATA2 SDIO_DATA1 SDIO_DATA0 I I/O I/O I/O I/O I/O Description SDIO 4-bit mode: Clock SDIO 1-bit mode: Clock SDIO 4-bit mode: Command line SDIO 1-bit mode: Command line SDIO 4-bit mode: Data line Bit[3]
SDIO 1-bit mode: Not used SDIO 4-bit mode: Data line Bit[2] or Read Wait (optional) SDIO 1-bit mode: Read Wait (optional) SDIO 4-bit mode: Data line Bit[1]
SDIO 1-bit mode: Interrupt SDIO 4-bit mode: Data line Bit[0]
SDIO 1-bit mode: Data line FORM NO.: FR2-015_ A Responsible DepartmentWBU 16 3.4.2 SDIO Protocol Timing 3.4.2.1 Default Speed, High-Speed Modes (3.3V) SDIO protocol timing Diagram - Default mode. (3.3V) SDIO protocol timing Diagram - High Speed mode. (3.3V) Symbol Parameter Condition Min Typ Max Units fpp CLK Frequency TWH CLK High Time TWL CLK Low Time TISU Input Setup Time TIH Input Hold Time Output Delay Time CL 40pF (1 card) TODLY TOH Normal High Speed Normal High Speed Normal High Speed Normal High Speed Normal High Speed Normal High Speed 0 0 10 7 10 7 5 6 5 2
25 50
14 14 MHz MHz ns ns ns ns ns ns ns ns ns ns ns
Output Hold Time SDIO Timing Data Default Speed / High-Speed modes. (3.3V) High Speed 2.5
FORM NO.: FR2-015_ A Responsible DepartmentWBU 17 3.4.2.2 SDR12, SDR25, SDR50 Modes (up to 100MHz) (1.8V) SDIO Protocol Timing Diagram - SDR12, SDR25, SDR50 Modes (up to 100 MHz)(1.8V) Symbol Parameter Condition Min Typ Fpp TCLK TIS TIH TCR ,TCF TODLY TOH CLK Frequency Clock Time Input Setup Time Input Hold Time Rise time, fail time TCR ,TCF <2ns(max) at 100MHz CCARD =10pF Output Delay Time CL 30pF Output Hold Time CL =15pF SDR12/25/50 SDR12/25/50 SDR12/25/50 25 10 3 SDR12/25/50 0.8 SDR12/25/50 SDR12/25/50
SDR12/25/50 1.5
Max 100 40
Units MHz ns ns ns 0.2*TCLK ns 7.5
ns ns SDIO Timing Data - SDR12/25/50 modes. (1.8V) FORM NO.: FR2-015_ A Responsible DepartmentWBU 18 3.4.2.3 SDR104 mode (208MHz) (1.8V) Symbol Parameter Condition Min Typ Fpp TCLK TIS TIH TCR ,TCF TOP TODW CLK Frequency Clock Time Input Setup Time Input Hold Time Rise time, fail time TCR,TCF<0.96ns(max) at 208MHz CCARD =10pF Card output phase Output timing of variable data window SDR104 SDR104 SDR104 SDR104 SDR104 SDR104 SDR104 0 4.8 1.4 0.8
0 2.88
Max 208 Units MHz
ns ns ns 0.2*TCLK ns 10
ns ns FORM NO.: FR2-015_ A Responsible DepartmentWBU 19 3.4.3.High-Speed UART Interface The AW-XM549 supports a high-speed Universal Asynchronous Receiver/Transmitter (UART) interface, compliant to the industry standard 16550 specification. High-speed baud rates are supported to provide the physical transport between the device and the host for exchanging Bluetooth data. Symbol Parameter Condition Min Typ Max Units TBAUD Baud rate 26MHz or 40MHz input clock 250
ns FORM NO.: FR2-015_ A Responsible DepartmentWBU 20 3.4.4 PCM Interface 3.4.4.1 PCM Timing Specification Master Mode Min
0.4
20 15
Typ Max Units 2/2.048 0.5 3
0.6
15
15 MHz
ns ns ns ns ns Symbol FBCLK Duty CycleBCLK TBCLK rise/fall TDO TDISU TDIHO TBF Parameter Condition
21 FORM NO.: FR2-015_ A Responsible DepartmentWBU 3.4.4.2 PCM Timing Specification Slave Mode Min
0.4
15 10 15 10 Typ Max Units 2/2.048 0.5 3
0.6
30
MHz
ns ns ns ns ns ns Symbol FBCLK Duty CycleBCLK TBCLK rise/fall TDO TDISU TDIHO TBFSU TBFHO Parameter Condition
22 FORM NO.: FR2-015_ A Responsible DepartmentWBU 3.4.5 SPI Interface Symbol Parameter Condition Min TSLCH TSHCH TCLK TIS TIH TODLY Chip select setup time Chip select hold time Clock period Input setup time Input hold time Output delay
12 12 40 12 0
Typ
Max Units
12 ns ns ns ns ns ns FORM NO.: FR2-015_ A Responsible DepartmentWBU 23 3.5 Timing Sequence AW-XM549 power up timing sequence. Symbol Parameter TPU_RESET Valid power to PDn deasserted Input high voltage Input low voltage VIH VIL Min 0 1.4
-0.4 Typ
Max
4.5 0.5 Units ms V V FORM NO.: FR2-015_ A Responsible DepartmentWBU 24 3.6 Power Consumption*
3.6.1 WLAN No. 1 2 3 4 Band
(GHz) 2.4 5 Band
(GHz) 2.4 5 Item Pdn *(1)(2) Deepsleep*(2)(3) Power Save 2.4GHz (DTIM-1)*(2)(3)(4) Power Save 5GHz (DTIM-1)*(2)(3)(4) JP1_PIN2 VBAT_3.3V (mA) Max. 0.18 0.4 62 69 Avg. 0.02 0.3 1.7 1.1 Mode BW
(MHz) RF Power
(dBm) Max. Avg. Transmit (mA) 11b@1Mbps 11g@54Mbps 11n@MCS0 11n@MCS7 11ax@MCS0 NSS1 11ax@MCS11 NSS1 11a@6Mbps 11n@MCS0 11n@MCS7 11ac@MSC0 NSS1 11ac@MSC9 NSS1 11ax@MSC0 NSS1 11ax@MSC11 NSS1 20 20 40 40 40 40 20 40 40 80 80 80 80 17 16 14 14 12 12 16 16 16 14 14 11 11 295 278 271 251 258 232 410 415 375 378 332 327 296 294 276 269 248 255 231 404 410 369 372 328 324 294 Duty Cycle Avg. (%) 99 88 96 81 96 77 98 96 80 93 72 92 76 Mode BW(MHz) 11b@11Mbps 11n@MCS7 11ax@MCS11 NSS1 11a@54Mbps 11n@MCS7 11ac@MCS9 NSS1 11ax@MCS11 NSS1 20 40 40 20 40 80 80 Receive (mA) Max. 61 73 73 73 83 101 100 Avg. 58 71 69 72 82 100 98 FORM NO.: FR2-015_ A Responsible DepartmentWBU 25 No. 1 2 3 4 Band
(GHz) 2.4 5 Band
(GHz) 2.4 5 No. 1 2 3 4 Band
(GHz) 2.4 5 Band
(GHz) 2.4 5 Item Pdn *(1)(2) Deepsleep*(2)(3) Power Save 2.4GHz (DTIM-1)*(2)(3)(4) Power Save 5GHz (DTIM-1)*(2)(3)(4) RF Power
(dBm) 17 BW
(MHz) 20 Mode 11b@1Mbps 11ax@MCS11 NSS1 11a@6Mbps 11ax@MSC11 NSS1 40 20 80 12 16 11 Mode BW(MHz) 11b@11Mbps 11ax@MCS11 NSS1 20 80 Item Pdn *(1)(2) Deepsleep*(2)(3) Power Save 2.4GHz (DTIM-1)*(2)(3)(4)(5) Power Save 5GHz (DTIM-1)*(2)(3)(4)(5) Mode 11b@1Mbps 11ax@MCS11 NSS1 11a@6Mbps 11ax@MSC11 NSS1 BW
(MHz) 20 RF Power
(dBm) 17 40 20 80 12 16 11 Mode BW(MHz) 11b@11Mbps 11ax@MCS11 NSS1 20 80 JP4_PIN2 VIO_3.3V (uA) Avg. Max. 23 23 181 181 189 327 187 327 Transmit (uA) Max. 480 473 498 484 Receive (uA) Max. 448 453 Avg. 479 472 496 484 Avg. 447 453 JP4_PIN2 VIO_1.8V (uA) Avg. Max. 2 2 61 61 61 61 61 61 Transmit (uA) Max. 44 44 45 45 Receive (uA) Max. 44 44 Avg. 44 44 44 44 Avg. 44 44 3.6.2 Bluetooth No. Mode Packet Type RF Power
(dBm) 26 JP1_PIN2 VBAT_3.3V (mA) Max. Avg. FORM NO.: FR2-015_ A Responsible DepartmentWBU 1 Deepsleep*(1) Transmit*(2) 2 3 Receive*(2) DH5 DH5 No. Mode Packet Type 1 Deepsleep*(1) Transmit*(2) 2 3 Receive*(2) DH5 DH5 No. Mode Packet Type N/A N/A N/A 2 N/A RF Power
(dBm) 2 N/A RF Power
(dBm) 1 Deepsleep*(1) Transmit*(2) 2 3 Receive*(2) 3.6.3 802.15.4 No. Mode 1 Deepsleep*(1)(2) Transmit*(3)(4) 2 3 Receive*(3)(5) DH5 DH5 2 N/A Modulation Type RF Power
(dBm) O-QPSK O-QPSK N/A N/A N/A 4 N/A RF Power
(dBm) 4 N/A RF Power
(dBm) No. Mode Packet Type 1 Deepsleep*(1)(2) Transmit*(3)(4) 2 3 Receive*(3)(5) O-QPSK O-QPSK No. Mode Packet Type 1 Deepsleep*(1)(2) Transmit*(3)(4) 2 3 Receive*(3)(5) O-QPSK O-QPSK 4 N/A 0.6 53 53 0.4 36 31 JP4_PIN2 VIO_3.3V (uA) Max. 180 437 437 Avg. 179 436 436 JP4_PIN2 VIO_1.8V (uA) Max. 61 43 43 Avg. 61 42 42 JP1_PIN2 VBAT_3.3V (mA) Max. 0.3 81 43 Avg. 0.13 53 42 JP4_PIN2 VIO_3.3V (uA) Max. 457 571 571 Avg. 457 570 570 JP4_PIN2 VIO_1.8V (uA) Max. 118 194 194 Avg. 118 193 193 3.7 Sleep Clock (Optional) An external crystal is used for generating all radio frequencies and normal operation clocking. As an alternative, an external frequency reference driven by a temperature-compensated crystal oscillator
(TCXO) signal may be used. No software settings are required to differentiate between the two. In FORM NO.: FR2-015_ A Responsible DepartmentWBU 27 addition, a low-power oscillator (LPO) is provided for lower power mode timing. External 32.768KHz Low-Power Oscillator Symbol Parameter CLK PN JC SR DC Clock frequency range/ accuracy CMOS input clock signal type 250 ppm (initial, aging, temperature) Phase noise requirement (@ 100KHz) Cycle jitter Slew rate limit (10-90%) Duty cycle tolerance Min Typ 32.768 Max Units
20
100 80 kHz dBc/Hz ns
(RMS) ns
-125 1.5
FORM NO.: FR2-015_ A Responsible DepartmentWBU 28 4. Mechanical Information 4.1 Mechanical Drawing FORM NO.: FR2-015_ A Responsible DepartmentWBU 29 5. Packing Information 1. One reel can pack 1,500pcs 12x12 LGA modules 2. One production label is pasted on the reel, one desiccant and one humidity indicator card are put on the reel One desiccant One production label One humidity indicator card 3. One reel is put into the anti-static moisture barrier bag, and then one label is pasted on the bag One production label 4. A bag is put into the anti-static pink bubble wrap One anti-static pink bubble wrap 5. A bubble wrap is put into the inner box and then one label is pasted on the inner box FORM NO.: FR2-015_ A Responsible DepartmentWBU 30 Production label One production label 6. 5 inner boxes could be put into one carton Production 7. Sealing the carton by AzureWave tape 8. One carton label and one box label are pasted on the carton. If one carton is not full, one balance label pasted on the carton FORM NO.: FR2-015_ A Responsible DepartmentWBU 31 One carton label One box label FORM NO.: FR2-015_ A Responsible DepartmentWBU 32 FCC:
Federal Communication Commission Interference Statement This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to Part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful interference in a residential installation. This equipment generates, uses and can radiate radio frequency energy and, if not installed and used in accordance with the instructions, may cause harmful interference to radio communications. However, there is no guarantee that interference will not occur in a particular installation. If this equipment does cause harmful interference to radio or television reception, which can be determined by turning the equipment off and on, the user is encouraged to try to correct the interference by one of the following measures:
Reorient or relocate the receiving antenna. Increase the separation between the equipment and receiver. Connect the equipment into an outlet on a circuit different from that to which the receiver is connected. Consult the dealer or an experienced radio/TV technician for help. FCC Caution: Any changes or modifications not expressly approved by the party responsible for compliance could void the users authority to operate this equipment. This device complies with Part 15 of the FCC Rules. Operation is subject to the following two conditions:
(1) This device may not cause harmful interference, and (2) this device must accept any interference received, including interference that may cause undesired operation. IMPORTANT NOTE:
FCC Radiation Exposure Statement:
This equipment complies with FCC radiation exposure limits set forth for an uncontrolled environment. This equipment should be installed and operated with minimum distance 20cm between the radiator & your body. IMPORTANT NOTE:
This module is intended for OEM integrator. This module is only FCC authorized for the specific rule parts listed on the grant, and that the host product manufacturer is responsible for compliance to any other FCC rules that apply to the host not covered by the modular transmitter grant of certification. The final host product still requires Part 15 Subpart B compliance testing with the modular transmitter installed. Additional testing and certification may be necessary when multiple modules are used. The host manufacturer should reference KDB Publication 996369 D04 Module Integration Guide. USERS MANUAL OF THE END PRODUCT:
In the users manual of the end product, the end user has to be informed to keep at least 20cm separation with the antenna while this end product is installed and operated. The end user has to be informed that the FCC radio-frequency exposure guidelines for an uncontrolled environment can be satisfied. The end user has to also be informed that any changes or modifications not expressly approved by the manufacturer could void the user's authority to operate this equipment. FORM NO.: FR2-015_ A Responsible DepartmentWBU 33 This device complies with Part 15 of FCC rules. Operation is subject to the following two conditions: (1) this device may not cause harmful interference and (2) this device must accept any interference received, including interference that may cause undesired operation. LABEL OF THE END PRODUCT:
The final end product must be labeled in a visible area with the following " Contains TX FCC ID:
TLZ-XM549". This device complies with Part 15 of FCC rules. Operation is subject to the following two conditions: (1) this device may not cause harmful interference and (2) this device must accept any interference received, including interference that may cause undesired operation. IC:
This device contains licence-exempt transmitter(s)/receiver(s) that comply with Innovation, Science and Economic Development Canadas licence-exempt RSS(s). Operation is subject to the following two conditions:
(1) This device may not cause interference.
(2) This device must accept any interference, including interference that may cause undesired operation of the device. Cet appareil contient des metteurs / rcepteurs exempts de licence qui sont conformes au (x) RSS (s) exempts de licence d'Innovation, Sciences et Dveloppement conomique Canada. L'opration est soumise aux deux conditions suivantes:
(1) Cet appareil ne doit pas provoquer d'interfrences.
(2) Cet appareil doit accepter toute interfrence, y compris les interfrences susceptibles de provoquer un fonctionnement indsirable de l'appareil. This device and its antenna(s) must not be co-located with any other transmitters except in accordance with IC multi-transmitter product procedures. Referring to the multi-transmitter policy, multiple-transmitter(s) and module(s) can be operated simultaneously without reassessment permissive change. Cet appareil et son antenne (s) ne doit pas tre co-localiss ou fonctionnement en association avec une autre antenne ou transmetteur. This radio transmitter [6100A-XM549] has been approved by Innovation, Science and Economic Development Canada to operate with the antenna types listed below, with the maximum permissible gain indicated. Antenna types not included in this list that have a gain greater than the maximum gain indicated for any type listed are strictly prohibited for use with this device. Le prsent metteur radio (6100A-XM549) a t approuv par Innovation, Sciences et Dveloppement conomique Canada pour fonctionner avec les types d'antenne numrs ci-dessous et ayant un gain admissible maximal d'antenne. Les types d'antennes non inclus dans cette liste qui ont un gain suprieur au gain maximal indiqu pour tout type list sont strictement interdits pour une utilisation avec cet appareil. FORM NO.: FR2-015_ A Responsible DepartmentWBU 34 The device for operation in the band 51505250 MHz is only for indoor use to reduce the potential for harmful interference to co-channel mobile satellite systems. les dispositifs fonctionnant dans la bande 5150-5250 MHz sont rservs uniquement pour une utilisation lintrieur afin de rduire les risques de brouillage prjudiciable aux systmes de satellites mobiles utilisant les mmes canaux. The maximum antenna gain permitted for devices in the bands 5250-5350 MHz and 5470-5725 MHz shall be such that the equipment still complies with the e.i.r.p. limit. le gain maximal dantenne permis pour les dispositifs utilisant les bandes 5250-5350 MHz et 5470-5725 MHz doit se conformer la limite de p.i.r.e. The maximum antenna gain permitted for devices in the band 5725-5850 MHz shall be such that the equipment still complies with the e.i.r.p. limits specified for point-to-point and non-point-to-point operation as appropriate. le gain maximal dantenne permis (pour les dispositifs utilisant la bande 5725-5850 MHz) doit se conformer la limite de p.i.r.e. spcifie pour lexploitation point point et non point point, selon le cas. For indoor use only. Pour une utilisation en intrieur uniquement. IMPORTANT NOTE:
IC Radiation Exposure Statement:
This equipment complies with IC RSS-102 radiation exposure limits set forth for an uncontrolled environment. This equipment should be installed and operated with minimum distance 20cm between the radiator & your body. Cet quipement est conforme aux limites d'exposition aux rayonnements IC tablies pour un environnement non contrl. Cet quipement doit tre install et utilis avec un minimum de 20 cm de distance entre la source de rayonnement et votre corps. IMPORTANT NOTE:
This module is intended for OEM integrator. The OEM integrator is responsible for the compliance to all the rules that apply to the product into which this certified RF module is integrated. Additional testing and certification may be necessary when multiple modules are used. Any changes or modifications not expressly approved by the manufacturer could void the user's authority to operate this equipment. USERS MANUAL OF THE END PRODUCT:
In the users manual of the end product, the end user has to be informed to keep at least 20cm separation with the antenna while this end product is installed and operated. The end user has to be informed that the IC radio-frequency exposure guidelines for an uncontrolled environment can be satisfied. FORM NO.: FR2-015_ A Responsible DepartmentWBU 35 The end user has to also be informed that any changes or modifications not expressly approved by the manufacturer could void the user's authority to operate this equipment. Operation is subject to the following two conditions: (1) this device may not cause harmful interference (2) this device must accept any interference received, including interference that may cause undesired operation. LABEL OF THE END PRODUCT:
The final end product must be labeled in a visible area with the following " Contains IC:
6100A-XM549 ". The Host Model Number (HMN) must be indicated at any location on the exterior of the end product or product packaging or product literature which shall be available with the end product or online. JP:
W52/W53 FORM NO.: FR2-015_ A Responsible DepartmentWBU 36 Ant list Ant. Port Brand Model Name Antenna Type Connector Gain (dBi) 1 2 1
MAG. LAYERS MSA-4008-25GC1-A2 PIFA Antenna CEL 0032-02-07-00-001 PIFA Antenna I-PEX I-PEX Note1 Note1:
Ant. 1 2 Gain (dBi) WLAN 2.4GHz/Bluetooth/Thread WLAN 5GHz 2.98 1.30 5.16 4.30 FORM NO.: FR2-015_ A Responsible DepartmentWBU 37 AW-XM549 AW-XM553 IEEE 802.11 1X1 a/b/g/n/ac/ax Wireless LAN
+ Bluetooth 5.3 + 802.15.4 Tri-radio 12mm x 12mm LGA module Layout Guide Rev. 01
(For Standard) 1 The information contained herein is the exclusive property of AzureWave and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of AzureWave. Revision History Version Revision Date Description Initials Approved 01 2022/04/06 Initial Version Roger Liu N.C. Chen 2 The information contained herein is the exclusive property of AzureWave and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of AzureWave. INTRODUCTION This document provides key guidelines and recommendations to be followed when creating AW-
XM553 layout. It is strongly recommended that layouts be reviewed by the AzureWave engineering team before being released for fabrication. The following is a summary of the major items that are covered in detail in this application note. Each of these areas of the layout should be carefully reviewed against the provided recommendations before the PCB goes to fabrication. GENERAL RF GUIDELINES Ground Layout Power Layout Digital Interface RF Trace Antenna Antenna Matching GENERAL LAYOUT GUIDELINES THE OTHER LAYOUT GUIDE INFORMATION 3 The information contained herein is the exclusive property of AzureWave and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of AzureWave. 1. GENERAL RF GUIDELINES Follow these steps for optimal WLAN performance. 1. Control WLAN 50 ohm RF traces by doing the following:
Route traces on the top layer as much as possible and use a continuous reference ground plane underneath them. Verify trace distance from ground flooding. At a minimum, there should be a gap equal to the width of one trace between the trace and ground flooding. Also keep RF signal lines away from metal shields. This will ensure that the shield does not detune the signals or allow for spurious signals to be coupled in. Keep all trace routing inside the ground plane area by at least the width of a trace. Check for RF trace stubs, particularly when bypassing a circuit. 2. Keep RF traces properly isolated by doing the following:
Do not route any digital or analog signal traces between the RF traces and the reference ground. Keep the balls and traces associated with RF inputs away from RF outputs. If two RF traces are close each other, then make sure there is enough room between them to provide isolation with ground fill. Verify that there are plenty of ground vias in the shield attachment area. Also verify that there are no non-ground vias in the shield attachment area. Avoid traces crossing into the shield area on the shield layer. 3. Consider the following RF design practices:
Confirm antenna ground keep-outs. Verify that the RF path is short, smooth, and neat. Use curved traces or microwave corners for all turns; never use 90-degree turns. Avoid width discontinuities over pads. If trace widths differ significantly from component pad widths, then the width change should be mitered. Verify there are no stubs. 4 The information contained herein is the exclusive property of AzureWave and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of AzureWave. Do not use thermals on RF traces because of their high loss. The RF traces between AW-XM553 RF_ANT pin and antenna must be made using 50 controlled-impedance transmission line. 2. Ground Layout Please follow general ground layout guidelines. Here are some general rules for customers reference. The layer 2 of PCB should be a complete ground plane. The rule has to be obeyed strictly in the RF section while RF traces are on the top layer. Each ground pad of components on top layer should have via drilled to PCB layer 2 and via should be as close to pad as possible. A bulk decoupling capacitor needs two or more. Dont place ground plane and route signal trace below printed antenna or chip antenna to avoid destroying its electromagnetic field, and there is no organic coating on printed antenna. Check antenna chip vendor for the layout guideline and clearance. Move GND vias close to the pads. 3. Power Layout Please follow general power layout guidelines. Here are some general rules for customers reference. A 4.7uF capacitor is used to decouple high frequency noise at digital and RF power terminals. This capacitor should be placed as close to power terminals as possible. In order to reduce PCBs parasitic effects, placing more via on ground plane is better. 4. Digital Interface Please follow power and ground layout guidelines. Here are some general rules for customers reference. The digital interface to the module must be routed using good engineering practices to minimize coupling to power planes and other digital signals. The digital interface must be isolated from RF trace. 5. RF Trace and RF PAD A. RF Trace 5 The information contained herein is the exclusive property of AzureWave and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of AzureWave. The RF trace is the critical to route. Here are some general rules for customers reference. The RF trace impedance should be 50 between ANT port and antenna matching network. The length of the RF trace should be minimized. To reduce the signal loss, RF trace should laid on the top of PCB and avoid any via on it. The CPW (coplanar waveguide) design and the microstrip line are both recommended; the customers can choose either one depending on the PCB stack of their products. The RF trace must be isolated with aground beneath it. Other signal traces should be isolated from the RF trace either by ground plane or ground vias to avoid coupling. To minimize the parasitic capacitance related to the corner of the RF trace, the right angle corner is not recommended. If the customers have any problem in calculation of trace impedance, please contact AzureWave. Correct RF trace Right-angled corner Via on RF trace 6 The information contained herein is the exclusive property of AzureWave and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of AzureWave. Incorrect RF trace AW-XM553 RF trace should be follow the rules as below a. Line length of Antenna trace about 88.7mi and 68.5 mil b. Line width of Antenna trace about 10 mil 7 The information contained herein is the exclusive property of AzureWave and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of AzureWave. c. Air gap between RF trace and ground about 4.5 mil B. RF PAD TOP layer: Air gap between RF PAD and ground is 4.5 mil 8 The information contained herein is the exclusive property of AzureWave and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of AzureWave. Inner Layer(L2): The length and width of keep out under RF PAD is 32.6 and 52.8 mil. 9 The information contained herein is the exclusive property of AzureWave and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of AzureWave. Inner Layer(L3): Must be continuous reference ground plane The information contained herein is the exclusive property of AzureWave and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of AzureWave. 10 Bot Layer: Must be continuous reference ground plane 6. Antenna All the high-speed traces should be moved far away from the antenna. For the best radiation performance, check antenna chip vendor for the layout guideline and clearance. 7. Antenna Matching PCB designer should reserve an antenna matching network for post tuning to ensure the antenna performance in different environments. Matching components should be close to each other. Stubs should also be avoided to reduce parasitic while no shunt component is necessary after tuning. The information contained herein is the exclusive property of AzureWave and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of AzureWave. 11 8. SHIELDING CASE Magnetic shielding, ferrite drum shielding, or magnetic-resin coated shielding is highly recommended to prevent EMI issues. 9. GENERAL LAYOUT GUIDELINES Follow these guidelines to obtain good signal integrity and avoid EMI:
1. Place components and route signals using the following design practices:
Keep analog and digital circuits in separate areas. Identify all high-bandwidth signals and their return paths. Treat all critical signals as current The information contained herein is the exclusive property of AzureWave and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of AzureWave. 12 loops. Check each critical loop area before the board is built. A small loop area is more important than short trace lengths. Orient adjacent-layer traces so that they are perpendicular to one another to reduce crosstalk. Keep critical traces on internal layers, where possible, to reduce emissions and improve immunity to external noise. However, RF traces should be routed on outside layers to avoid the use of vias on these traces. Keep all trace lengths to a practical minimum. Keep traces, especially RF traces, straight wherever possible. Where turns are necessary, use curved traces or two 45-degree turns. Never use 90-degree turns. 2. Consider the following with respect to ground and power supply planes:
Route all supply voltages to minimize capacitive coupling to other supplies. Capacitive coupling can occur if supply traces on adjacent layers overlap. Supplies should be separated from each other in the stack-up by a ground plane, or they should be coplanar (routed on different areas of the same layer). Provide an effective ground plane. Keep ground impedance as low as possible. Provide as much ground plane as possible and avoid discontinuities. Use as many ground vias as possible to connect all ground layers together. Maximize the width of power traces. Verify that they are wide enough to support target currents, and that they can do so with margin. Verify that there are enough vias if the traces need to change layers. 3. Consider these power supply decoupling practices:
Place decoupling capacitors near target power pins. If possible, keep them on the same side as the IC they decouple to avoid vias that add inductance. If a filter component cannot be directly connected to a given power pin with a very short and fat etch, do not connect it by a copper trace. Instead, make the connection directly to the associated planes using vias. Use appropriate capacitance values for the target circuit, and consider each capacitor's self-
resonant frequency. The information contained herein is the exclusive property of AzureWave and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of AzureWave. 13 10. Module stencil and Pad opening Suggestion Stencil thickness0.10~0.12mm Function Pad opening size suggestion: Max. 1:1 PS: This opening suggestion just for customer reference, please discuss with AzureWaves Engineer before you start SMT. Solder Printer Opening and Customer PCB Footprint suggestion. Example:
(Top View) 14 The information contained herein is the exclusive property of AzureWave and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of AzureWave. 11. The other layout guide Information Make sure every power traces have good return path (ground path). Connect the input pins of unused internal regulators to ground. Leave the output pins of unused internal regulators floating. High speed interface (i.e. UART/SDIO/HSIC) shall have equal electrical length. Keep them away from noise sensitive blocks. Good power integrity of VDDIO will improve the signal integrity of digital interfaces. Good return path and well shielded signal can reduce crosstalk, EMI emission and improve signal integrity. RF IO is around 50 ohms, reserve Pi or T matching network to have better signal transition from port to port. Smooth RF trace help to reduce insertion loss. Do not use 90 degrees turn (use two 45 degrees turns or one miter bend instead). Well arranged ground plane near antenna and antenna itself will help to reduce near field coupling between other RF sources (e.g. GSM/CDMA antennas). Discuss with AzureWave Engineer after you finish schematic and layout job. The information contained herein is the exclusive property of AzureWave and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of AzureWave. 15 12. Mechanical Drawing Package Outline Drawing The information contained herein is the exclusive property of AzureWave and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of AzureWave. 16 Top View of PCB Layout Foot Print The information contained herein is the exclusive property of AzureWave and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of AzureWave. 17